1. Technical Field
The present invention relates to an integrated circuit (IC) having Electrostatic Discharge (ESD) protection circuits.
2. Related Art
During operation of electronic elements, ESD is a main factor causing most of the electronic elements or electronic systems to be damaged due to Electrical Overstress (EOS); in particular, in the case that a process of the electronic elements is more and more precise, and the size thereof is more and more small, the ESD effect easily breaks down the electronic elements and causes a permanent damage to semiconductor elements and computer systems, resulting in relevant electronic products being affected and relevant devices functioning abnormally.
In a procedure of manufacturing, producing, assembling, testing, storing, or transporting the electronic elements or the electronic systems, electrostatic force is accumulated in human bodies, the electronic elements, and various electronic devices or instruments. When the objects with the electrostatic force contact with each other, an ESD discharge path is formed, so that the electronic elements or the electronic devices are unpredictably damaged.
ESD protection circuits are specially used for ESD protection in an IC. The ESD protection circuits provide an electrostatic force discharge path, so as to avoid the electrostatic force flowing into an internal circuit of the IC and causing damage, when ESD occurs.
Generally, the ESD protection circuits are designed beside an input/output (I/O) pad, a power pad, or a ground pad of the IC. However, with the evolution of the process, the price of the process continues to increase. A cost-reduction design still cannot be applied to an area of the pad with the evolution of the process. However, with the continuously reduced size of the elements in the IC, the circuit elements are more sensitive to the damage caused by the ESD. Therefore, an ESD protection hierarchy must be strengthened, and thus the area of the pad necessarily must be enlarged, thereby increasing the whole cost of the IC. In this way, in various design programs of the IC, the ESD-related reliability and cost must necessarily be taken into consideration.